S2 Forum
Sign up Calendar Latest Topics
 
 
 


Reply
  Author   Comment  
Suavek

Avatar / Picture

Moderator
Registered:
Posts: 11
Reply with quote  #1 
In this topic we discuss the specification of the VGA51 graphics adapter which comes directly from developed as well as received feature requests including your "wishlist" which meant to be updated here.

Current VGA51 specification can be found here:
http://m.eskwadrat.com/app/vga51_spec/8318104/36/
 
0
Suavek

Avatar / Picture

Moderator
Registered:
Posts: 11
Reply with quote  #2 
In additional to the VGA51 spec listed under above link, here are some important notes related to its design:

The VGA51 design embraces three major properties:

1. maximizing platform longevity (by using mezzanine based pcb approach where existing fpga can be substituted with any other future that may come if existing one become obsolete)
2. scale-ability to ensure card functions expansion (like adding high res.graphics modes or adding another console emulation std) with no or minimum HW change, specially within the base s100 board.
3. versatility of interfacing to other systems (including s100) by providing sets of control signals compatible with multiple CPU/MPU platforms with various address range. The vga51 card is capable of being used in several environments: from 8-bit Z80 for example with limited 64kB space range (8kB window to access vram seem to be reasonable) through 16-bit systems capable of providing more address space ending with console mode where linear memory access is not utilized at all.

0
Suavek

Avatar / Picture

Moderator
Registered:
Posts: 11
Reply with quote  #3 
A separate note regarding VGA51 interfacing and operation.

The VGA51 design uses internal ram configuration which allows seamless access to video RAM with no need to wait till blanking. It is possible thanks for the way dual ported sram inside the VGA51 chip is used which have been organized where simultaneous write by user and read by VGA control core is provided. If read/write happens at the exact same time, currently the monitor will display "previous" pixel until next frame when new data is accounted for. This way in less powerful systems like Z80 or MCS51 based, the application do not have to wait till blanking time to write data to video ram, instead it can access it anytime.

Still more powerful systems like x86 based cards can monitor blanking interrupt (which VGA51 provides) and use it to synchronize video ram page writes to achieve smooth graphics animations. The theoretical VGA51 fpga chip write/read bandwidth is 25MHz. Achieving this number very much depends from the interface design which may limit this speed. However, for S100 bus for example it seem to leave plenty of room.

Currently fabricated, incoming early next week ISA samples of VGA51 will allow me to benchmark it when used in couple of my ISA equipped PC-AT clones running bus up to 8 and 16MHz rate. The benchmark results will be posted on VGA51 website as well as shared here.

0
Previous Topic | Next Topic
Print
Reply

Quick Navigation:

Easily create a Forum Website with Website Toolbox.